James K. Roberge: 6.302 Lecture 19

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JAMES K. ROBERGE: Hi, today I'd like to discuss a specific kind of an electronic feedback system called a phase-locked loop. The general topology for a phase-locked loop is shown on the board. The input to this type of a system is a command frequency. And the information that we're interested in, in that input signal is specifically its frequency. In certain kinds of phase-locked loops we have a sinusoidal input. In others we may have a digital, logic kind of signal. I say in any of these the common feature is that the information of interest is the frequency of the signal.

That input signal, or command signal, is applied to a phase detector. And the output of the phase detector goes to an element indicated as a loop filter. The loop filter is sort of jargon in phase-locked loop technology for what we've been calling compensation all along. For some reason it seems traditional in this technology to call the compensating element, the one that provides loop stability, the loop filter.

The output signal from the loop filter is applied to a voltage controlled oscillator. And of course, the frequency out of this voltage controlled oscillator depends on the signal applied at its input. That frequency is the response of the system. And again, the thing we're interested in, of course, is the frequency of the output signal.

The output signal is then fed back to form the second input to the phase detector. The signal out of the phase detector, in a way that we'll see in a bit, is proportional in some sense to the difference in phase between its two inputs.

There are numerous applications for this sort of circuit. For example, one way to use a phase-locked loop is as a detector for frequency modulated signals.

The signal at this point, the phase error between the command frequency and the response frequency is, of course, effectively the error signal in the loop.

And if we have a loop with high desensitivity with large loop-transmission magnitude, the response frequency should be very nearly identical to the command frequency. In fact, the phase difference between those two signals should be very, very small. Hence the name phase-locked loop.

If, in addition to that, we have a voltage controlled oscillator that's linear. That is, whose output frequency is directly proportional to its input voltage. We're able to use the voltage at this point as a measure of the frequency of operation of the voltage controlled oscillator. And when the loop is locked as a measure of the input frequency or the command frequency. And so in that way, we're able to use a phase-locked loop as an FM demodulator. The signal at this point will be proportional to the frequency applied to the input.

In other applications, we use phase-locked loops to recover carriers in, again, communication systems where we're interested, for example, in generating a carrier or a center frequency locally for use in some sort of demodulation scheme.

Typically in those sorts of applications, because the input signal may be quite noisy, we get filtering out of the phase-locked loop by really making it a narrow band filter. By effectively, greatly reducing the crossover frequency of the feedback system that mechanizes the phase-locked loop. That crossover frequency becomes approximately the filter bandwidth. And we're able to then, recover a fairly noisy carrier signal, and somehow use that in a further demodulating process in a communication system.

Another application of phase-locked loops is in frequency synthesizers. Suppose we had the basic phase-locked loop as shown. But in addition, we put in a counter in the feedback path, a divide by N sort of a circuit like so in the feedback path. And now let's see what the relationships are.

Well, to the extent that the loop captures, we argue that the signal at this point must be equal to the command frequency. And consequently, the response of the system will have to be equal-- I'm sorry, I have this incorrect. The command frequency will be equal to the response frequency divided by N.

Consequently, the frequency supplied by the system, the output frequency of the system, will simply be equal to N times the command frequency.

When we use this technique for frequency synthesis, we make the command frequency a very precisely known frequency. This is derived from a very high stability oscillator, an atomichron, something like that.

We're then able to, by changing the division ratio in a digital divider, and as of course an integral number, we can build a divide by N sort of digital circuit. We are then able to, in discrete steps, get a response frequency that's a direct multiple of the command frequency. Consequently, we can generate with a resolution dependent on actually the frequency of the command signal with that sort of resolution since we get integral multiples of that frequency at the output. We're able to generate multiple frequencies, each of which has the same stability as the command frequency. And so this technique is used in frequency synthesizers.

In order to investigate the feedback aspects of a phase-locked loop, we have to look at a model for that sort of a system. And in particular, we have to consider how we model the phase detector. As we'll see, these systems are typically non-linear in quite important ways, and in ways that have very profound implications for the operation of a system. But generally, we can model them for some limited range of difference between the input frequency and the response frequency as a linear system.

And when we do that, we end up with a linearized block diagram that's something like this. We have our commanded frequency at the input. Again, I'm using linear notation or frequency domain notation here, the capital F sub lowercase c as the input to our system. And the system responds, the linearized or the transform of the linearized output is capital F sub lowercase r. And we subtract those two quantities.

The resultant difference is the error in frequency between the command signal and the signal being provided by the phase-locked loop. But this is a frequency quantity. This is a number that tells us the number of cycles per second difference, for example, between this signal and this signal.

But our phase detector doesn't measure frequency, it measures phase. And, of course, phase is simply the integral of frequency.

If we have two signals that differ in frequency by some amount, their relative phase changes linearly with time, providing the two frequencies are different but each constant. The phase angle between the two of them is a progressive function of time. And in fact, linearly proportional to time.

Consequently, when we're interested in the error in phase rather than the error in frequency, and the error in phase is what our phase detector really gives us, there's a single integration between frequency and phase. And we represent that as simply a 1/s in our block diagram.

There's then some gain factor, some scale factor, associated with whatever wave we mechanize, the phase detector. And again, we'll see examples of that in a moment. So we get some gain scale factor associated with the phase detector itself.

We then go through our loop filter, a of s. There's presumably some scale factor associated with the voltage controlled oscillator. In other words, some number of volts at the input of the voltage controlled oscillator gives us a given change in its output frequency. We'll call that scale factor a sub v.

And then, finally, we get the output frequency from the phase-locked loop. The interesting or the important thing here is that there's an intrinsic integration in this system that simply has to do with the conversion from frequency to phase. We've seen that sort of a thing before in other systems when we looked at mechanical systems that included a motor. We remember the when we put a fixed voltage onto a motor, we get an output angle that's a progressive function of time.

If we have a fixed voltage in a motor, we get a ramp for the total output angle. And so if we write the transfer function that relates input voltage to output position, or theta, we get an integration in that transfer function.

Here we have the same sort of a thing, a physical process that gives us an integration.

There are several ways a modeling these incidentally. You may have seen them done in a different way. In some cases, the block diagram itself is written in terms of phase, rather than frequency. The input being a phase command, and then keep track of the output phase. In that case, the integration appears in conjunction with the voltage controlled oscillator since the input to the voltage controlled oscillator is a voltage. The output is the total phase angle that the oscillator has traversed, or has gone through. In that case, we rearrange the block diagram a little bit. We get the integration appearing in a different place in the block diagram. But, of course, there's still the single integration.

Well, how do we mechanize the phase detector? That's an important consideration in this type of system. There are a number of ways and they differ, particularly in their large signal behavior. One very simple way is to use an exclusive-OR gate if the input signal and the output signal of our phase-locked loop are both digital signals. Let's look at how that might work.

Suppose our commanded frequency is the digital signal with a phase as shown. And assume that the response of the system is again, a digital signal phase shifted by 90 degrees in time, by a quarter of a cycle.

If we applied those two digital signals to an exclusive-OR gate, we'd get the following output from the phase detector itself. If we used simply an exclusive-OR gate as the phase detector, we'd get the following kind of an output.

Here in this time interval, one of the signals is high. Consequently, the output of the exclusive-OR gate is high. In this period, both inputs to the XOR gate are high. The output of the XOR gate is low.

Here again, one signal is high. Only one is high. The output of the XOR is high.

Here, they're both low. The output of the XOR is low.

The information we're interested in is really the average value of this signal. And so to complete the phase detection process, we might standardize levels, not allow them the ambiguity associated with normal digital levels. We'd go through some sort of an analog switch, so that we got standard levels coming out of our exclusive-OR gate. And then go through a low pass filter that extracted the average value of the output from the exclusive-OR gate.

In this particular case where we have a 90 degree relative phase shift between the command signal and the response of the system, the average value of the signal out of the exclusive-OR gate would be simply 1/2 of its maximum value since it spends half its time in the high and half its time in the low state. Again, I think you notice the same sort of a thing as we had in one of the oscillator examples before, where we have a high frequency process going on. The exclusive-OR gate, in this case, is running at twice the operating frequency of the loop for this particular combination of inputs. The output is a double frequency component. Plus a low frequency, in this case, a DC component, if there's no change in the relative phase between the two signals.

What we're interested in, the information is contained in the average value of the signal. So we have to apply some filtering to some sampling going on. We have sampling kinds of problems here. And that puts a very real limit on the crossover frequency of the loop. And as we did in the case of the oscillator whose amplitude was controlled, we argued that to eliminate those sorts of problems, we cross over in this kind of a loop at a very small fraction of the operating frequency.

Here, we intend to cross over at a small fraction of f sub c or f sub r. And by doing that, we're able to easily extract the average value of this signal to use as a phase indication. Let's consider what happens if the relative phase between the input and the output signals change, such that now the response of the system, the second response of the system, is in fact, in phase with the command signal. So we have one that's directly in phase with the command signal.

In that case, the output of our exclusive-OR gate is always low. So this would be the output from the exclusive-OR gate that corresponds to this second response from the system.

If we averaged that, of course, we'd get 0. If we average the output of the exclusive-OR gate when the two signals are 90 degrees out of phase, we get half of full scale.

If we continued this and looked at what happened when the response of the system was 180 degrees out of phase with the command frequency, we'd find out that the output of the exclusive-OR gate was always in its high state. If we averaged that, we'd get the high level. And so if we look at the average value of the output from the exclusive-OR gate as a function of the relative phase shift between the two signals, which I've called alpha, we get a signal that is 0 for 0 degrees of relative phase. Is half of maximum value for 90 degrees of relative phase. Reaches the maximum value for 180 degrees of relative phase.

If we continued this, we'd find out that we'd have a triangular function that comes back down. Once again, reaching 0 degrees when we've accumulated a total phase difference of 360 degrees between the two signals. The error pattern, the average value of the exclusive-OR output signal as a function of relative phase angle between the two input signals, is cyclical. Repeats every 360 degrees. It exhibits both positive and negative slopes if we look at the full 0 to 360 degree range.

One of those, when we build a loop, will represent a point where we have positive feedback. One will represent a point where we have negative feedback in the loop. Let's assume that this slope gives us negative feedback in our overall loop.

We'd then presumably, try to arrange the loop, so that its operating point was somewhere in here. That would allow us a maximum of plus or minus 90 degrees of phase deviation between the two signals before we had a phase reversal, a polarity reversal in the loop. So we'd have a total range over which the loop would hopefully work normally of plus or minus 90 degrees of relative phase between the two signals.

There are a lot of other ways to do a phase detection. For example, we can get much the same kind of thing as we do in the exclusive-OR gate with a little bit of different detail about the way the pattern repeats if we simply use a set reset flip-flop as the phase detector. Set it on one of our signals, reset it on the second signal. Again, if the two signals, in that case, are 180 degrees out of phase, we'd find out that the duty cycle of the flip-flop would be 50%. It would spend half its time in each state. We'd, once again, average that output.

And if we chase through the relationships, assuming we're setting on one of our signals and resetting on the other, we'd find out that we'd get a signal proportional to-- the average value of the flip-flop output would be proportional to the relative phase difference between the two digital signals.

For an example of this sort of system., we're going to look at a commercially available integrated circuit phase-locked loop, a type 565, which has been around a while. It uses a different kind of a phase detector. In the 565, the reference signal, the input, the command signal actually, in the phase-locked loop, is a sinusoid. We get a sinusoidal input. The signal that's fed back is actually a two-level signal, a digital kind of a signal. A square wave sort of a thing. And the phase detector used in the 565 basically performs a multiplication of these two signals.

And then, once again, averages the output. And we can look at the operation of that. Again, we assume a relative phase angle alpha between the two signals.

Here, if alpha were 0, we would get as the output of the phase detector, the product of these two signals. We'd effectively get a full wave rectified sine wave. If alpha were 0, we'd multiply this part of the sine wave by plus 1, this part by minus 1, which would flip it over. So the output from the phase detector prior to filtering would be a full wave rectified sine wave.

If we have 90 degrees of relative phase shift, we find out that the average value of the output is 0. We get little segments that are this segment and that kind of a sinusoidal segment. When We average those, we get 0 for an output.

When there's 180 degrees of relative phase shift, we get a negative full wave rectified sine wave when alpha is such that we multiply this part by minus 1, this part by plus 1. When we have 180 degrees of relative phase shift, we get a negative full wave rectified sine wave. And so we get a maximum negative average value.

If we keep track of those relationships, this sort of a phase detector, or the average value out of this sort of a phase detector, gives us a transfer function. Or a transfer relationship like so, a sinusoidal picture.

If we normalize things so that slope is 1 in here, we hit a maximum value of 2 over pi at the extremes, or minus 2 over pi at the other extreme. Again, this is cyclical. It repeats. We get points of positive feedback or points of negative feedback displaced from each other by 180 degrees of relative phase shift.

Only one of these sets of points will be a stable equilibrium for the loop. The other one, of course, will be a positive feedback point.

In many phase-locked loops, we intentionally include an additional integration in the loop. We indicated there was one inherent integration that has to do with the conversion from frequency to phase.

But in many loops, we include an additional integration. And the reason for that is so that under steady-state conditions, we get zero phase error in the system.

If we have one more integration following the phase detector, and if we can stabilize the loop, why the additional integration would tell us that under static conditions, when the signals are time invariant, the loop will work to drive the signal out of the phase detector to zero. Or to its operating point, exactly to its operating point. So we'll end up with a system that has zero relative phase error, whatever the operating point is. In some of these detectors, for example, the operating point's 90 degrees apart. In some it's 180 degrees apart.

But if we included an additional integration, when the input frequency were constant, we'd drive to that equilibrium point exactly. This 565 doesn't include that. The output of the phase detector can be modeled in the 565 as some sort of a Thevenin equivalent with a voltage generator proportional to the phase error and some output resistance.

If you mechanize the loop filter in the 565 by adding some components external to this Thevenin equivalent by a terminal on the integrated circuit. And then this signal continues on inside the integrated circuit to change the frequency of operation of the voltage controlled oscillator. This signal is the one applied to the VCO.

Well, one thing we might do is simply add a capacitor, which I've chosen to call C big across this pair of terminals. And that provides the filtering function. The signal here is really the raw signal from the phase detector before filtering, and we indicated we have to do some filtering. We don't want to apply a time varying signal to the phase detector. So we might do that by simply putting a capacitor onto that terminal.

When we do that, we might find the following kind of a plot of loop-transmission magnitude versus frequency. If the capacitor were large enough, we'd get this sort of behavior. We have a single integration at low frequencies, some constant associated with that. And then we get a pole that's equal to, or located at a frequency that's 1 over this RC product. And beyond that pole, we get a second-order roll-off. We'd crossover with a slope of 1 over s squared as shown. Or at least if we had a sufficiently large capacitor, that would happen.

And if we did this, if we pushed the pole back to very low frequencies, we'd have poorly stable performance. We'd have low phase margin in the system. We could, of course, use a smaller value capacitor, one that was adequate for filtering the ripple out of the phase detector but didn't create this problem. However, there's an alternative that can be used to give us somewhat higher desensitivity given that the crossover frequency is more or less a fixed quantity. Because we have to cross over at a small fraction of the operating frequency.

We can use a slightly more complicated network at the outside of the package that looks something like this. We have our C sub big, which might be the same value as the C sub big before. But then we can put a series resistance associated with that.

At high frequencies, we'd get simply an attenuation between this point and this point. Then we'd get lag kinds of transfer functions out of that combination.

We might then put a smaller capacitor across this network that would provide additional ripple filtering at high frequencies. So the purpose of this is simply to provide ripple filtering.

If we do that, we can get a loop-transmission magnitude that's generally of this form. We have 1/s kind of roll-off at low frequencies. At somewhat higher frequencies, we get into the pole of the lag type transfer function. And that pole location is, of course, given by the C sub b and the sum of these two resistors. That RC product determines the pole location in the lag type transfer function. We later get the zero associated with the lag type transfer function. And we'd presumably arrange things so that that zero occurred at a frequency below crossover. We can then crossover with acceptable phase margin in our system.

And then finally, at a frequency well beyond crossover, we'd get the filtering action of the small capacitor. And presumably, we choose the value of that capacitor so that it provides adequate filtering to the residual ripple out of the phase detector.

This is the way we've arranged a demonstration system using the 565. And, in fact, what we're able to do in the demonstration system is change this resistor. The net effect of doing that is principally to change the location of this zero. So we can get a family of responses from our phase-locked loop, or a family of loop-transmissions that correspond to either crossing over with a 1 over s squared kind of a roll-off where we've pushed out the zero to higher frequencies, or we can cross over with a 1/s kind of roll-off, that presumably should give us considerably better stability.

Here we have the system we're talking about. Buried in here is the 565 type phase-locked loop chip, and some of the peripheral components that we need. This is the potentiometer that's mechanizing the resistor function that I had mentioned.

We are driving the whole thing with an external voltage controlled oscillator. So this box is a function generator, which can in fact be voltage controlled. And we can use that function to put in changes in input frequency.

And here we have a signal generated again, in our little test circuit that we can use to modulate-- to frequency modulate the generator that's providing our command signal. The amplitude of that command, the amplitude of the signal driving the frequency modulation input on our input generator can be controlled with this potentiometer.

And what we see now is the commanded signal applied actually, to the voltage controlled oscillator. The bottom trace on the oscilloscope, the square wave is the signal that we're applying to the FM input on our signal generator. So when we apply a positive signal, the frequency speeds up a bit. When we apply a negative signal, the lower level, it slows down a bit.

The top trace is really, indicating the response of our loop. And there's a particularly convenient place to look in one of these sorts of loops. That's the input to the voltage controlled oscillator. So the signal on the top trace of the oscilloscope is the signal into the voltage controlled oscillator, to the extent that the VCO is dynamic-less. That's a direct measure of the output frequency of the system. And so rather than trying to do something, some sort of a discriminator that operates on the output frequency, we're able to use the input signal to the voltage controlled oscillator as that signal.

Now I'll change the resistor that I indicated in the network. And as we go to smaller values of resistor, why we should have relatively less stability in the system. So let me work on this. This is going toward larger values of that resistor. And we get very close to first-order kinds of responses as we make this resistor larger. We get, as I say, very close to first-order kinds of responses. We cross over with very nearly a 1/s kind of slope. We've moved this zero back toward lower frequencies.

If I now make the resistor smaller, we cross over, or we can force crossover in a 1 over s squared kind of a region. And as we do that, we get progressively less stable responses. So here's the case where we have a very small value for the resistor. We notice a very highly oscillatory response, probably corresponding to several degrees of phase margin.

We can, again, improve the behavior of the system, improve the damping by going to a larger value of resistor. But the speed of the system slows down a little bit. We can observe that sort of behavior in the output frequency. The output frequency is, of course, being modulated, being frequency modulated, proportional to the signal shown.

We notice on the signal, relatively small-- we don't really see much ripple at all from the phase detector. This particular system is working at a carrier frequency of about 30 kilohertz. And we cross over at a fraction of a kilohertz, somewhere on the order of 700 hertz. So we're crossing over at a small fraction of the carrier frequency. We're able to do a very good job of filtering the signal out of the phase detector with that sort of spread between crossover frequency and the frequency of operation.

I had mentioned earlier that there are linearity problems associated with phase-locked loops. And we can see a little bit of that. Let's look at the response of our system, and let's see if we can observe some of those difficulties.

One of them we can get-- let's go in there, for example. We notice that that looks almost like a second-order response. But if we look at it very, very carefully, we find out that that really isn't the response of a linear second-order system.

For example, the second positive overshoot is big relative to the first negative undershoot, if you will. It's not the kind of a transient response that corresponds to a true linear system.

The response also sort of damps out a little bit too quickly compared to the size of the first overshoot. So there's something just a little bit funny about the response of the system, and that reflects the non-linearities associated with the phase detection process, and the difficulties of maintaining lock for large ranges of signal.

We can make that problem worse by increasing the amount by which we change the command input. And if I do that with this potentiometer, which simply adjusts the amplitude of the signal applied to our external generator, well, we notice we can get quite bizarre modes of behavior in the phase-locked loop. Really very poor performance. And what's really happening here is we're commanding such a large frequency excursion at the input, that the loop can't really keep up. We skip a couple of cycles. The phase detector is cyclical as I mentioned. We jump a few cycles. The recovery from that is quite tortured.

If we go back to a more modest input, we get considerably better looking kinds of responses. Although, we can see a gradual change in the nature. There is a response that looks somewhat non-linear. Again, the third positive overshoot is really too small relative to the others.

And there, again, is the very bad response when we completely overdrive the system. There's a rather complex relationship between that control and the amount of damping in the system and so forth. All of which interact in the large signal performance of the system.

Much of the difficulty in the large signal behavior of a phase-locked loop deals with, or has to do really, with the cyclical nature of the phase detector. The kinds of phase detectors that I've discussed are ones that repeat every 180 or 360 degrees, or whatever. And in some sense, one of the problems with that sort of a thing is consider the behavior when we have a significant difference between the frequencies that we're applying to the phase-locked loop and the frequency that the circuit is responding at.

If there's a major frequency difference, the output of the phase detector will be a signal at basically the difference frequency between the two. It effectively has zero average value from that kind of a phase detector.

And so when we're in that situation, the phase-locked loop has a very difficult time reacquiring lock. Because it doesn't get a clear indication of the error. It doesn't get a clear indication of which frequency applied to the phase detector is the higher of the two. And so it has a great deal of difficulty recovering. The dynamics of those sorts of large signal behavior in phase-locked loops are very complicated. And a lot of the difficulty of design in a phase-locked loop comes from trying to build a loop that will have good acquisition time.

It's fairly easy to get a loop that's well-behaved for small signals, for sufficiently small signals. But if you'd like to have a large, or a very fast selling time for a large frequency error, well, we find that's a much more difficult thing to do. That problem exists, for example, off times in the frequency synthesizer.

You make a change, actually a step change in N. Change the value of N. That disturbs the loop. But in many cases, you'd like to have very rapid settling to a new frequency, and to the new frequency at the output. That kind of settling, rapid settling is a very challenging sort of design problem.

Part of the secret is to use a better phase detector than the ones we've talked about here. For example, there are more complicated, more sophisticated phase detectors. Most of them digital in nature. There are several that are available in integrated circuit form, although we chose not to use them in this particular system. There are several which keep track of which frequency is higher. There are ones that work in basically the mode we've described when the two frequencies applied to them are identical. But when the frequencies are different, such that you've slipped by a cycle between the two inputs, so that they've slipped relative to each other by a cycle. Why then the phase detector hangs up and consistently gives you either a high output or a low output. And that difference indicates which direction you should change the output frequency to get into correspondence with the command frequency.

Another possibility for a phase detector that has again, a wide dynamic range, if our signals are digital in nature, is to simply use an up/down counter as the phase detecting element. We'll see an example of that actually, in the next lecture, where I build a particular kind of a phase-locked loop and I use an up/down counter as the phase detector.

Again, one might envision such a loop operating when the two frequencies applied to it are identical. It works as we've described. We get a signal from it, which basically is averaged in order to get a relative phase error when the two signals are nearly identical. When the two frequencies are identical, but there's a relative phase difference between them. We have some sort of a digital signal that's averaged.

When the frequencies now differ, why the up/down counter accumulates counts either up counts or down counts, depending on whether the command frequency or the response of the circuit is greater. The state of that counter then, is a direct measure of the total number of cycles that we've slipped between the two.

We can then, conceptually [? d to a ?] convert the output of the counter, get an analog signal that's a measure of the total number of cycles, the total phase error. We [UNINTELLIGIBLE] have this cyclical nature where things cycle every 180 degrees of relative phase error, or every 360 degrees, and we're able to keep a complete measure of the total phase error of the system, the total accumulated phase error. And in that way, we're able to build a system that's linear for very large phase differences. Many cycles of phase error depending on the length of the up/down counter. And that will enable us to build a system that exhibits linear responses for very large changes in the commanded frequency. And in that way, people are able to build phase-locked loops. That's one technique, at least, used to build phase-locked loops that have wide dynamic range.

We one more demo we can use this box for. Here what we're looking at is, again, using effectively the same setup, but where we've made a couple of modifications to component values, so that we've increased the dynamic range of the circuit. The circuit with parameters as we demonstrated it before, had a very small dynamic range, a very small range of frequencies over which the loop would work properly. Here we've modified that a little bit, so there's now a few percent possibility for change in frequency.

And what we're looking at is the-- on one hand again, the signal that's applied to the VCO, which is proportional to the command signal. And then the bottom trace is a signal, not the actual operating frequency of the loop, but a divided multiple of the output frequency at which the phase-locked loop is operating. So we can see it conveniently on the same sort of a time scale as the VCO signal.

And what we can observe here is the behavior if we increase the amplitude of the drive signal. We again, could get into non-linear behavior quite easily. But if we don't go to that point, we can see the FMing behavior here on the first part of the signal, if it were direct coupled on the signal into the VCO. We'd see that the first half maintains it's DC level. And the frequency on the first part of the cycle does not change as we change the amplitude.

However, the frequency in the second portion, the following part of the trace we notice changing, actually going towards higher frequencies as we increase the amplitude of the signal applied. We also know, as I say, some non-linear behavior. There's a little bit of top there change in mode of behavior in there. But as long as we stay down in this range, avoid slipping cycles basically in the phase detector, we get a fairly nice indication of the change in frequency that occurs from the voltage controlled oscillator.

This concludes our introduction to phase-locked loops. In the next lecture, I'd like to show another example of a rather interesting application of a phase-locked loop. And we'll see how we can use this to control a mechanical system. Here, of course, we've been looking at a purely electronic system. But we'll look at a phase-locked technique for motor speed control in the next lecture. Thank you.